Original address:?http://blog.ednchina.com/riple/74835/message.aspx#

以前遇到過幾次類似問題，只知道關閉一下就可以通過，但是沒搞清原理。在Altera的一篇文檔里找到了答案:?

In the Settings dialog box, under the Compilation Process Settings section, select Incremental Compilation. Set the Incremental Compilation option to Off.
By turning off the Incremental Compilation option, pre-synthesis signals can be added to the SignalTap II ELA in the later sections. Pre-synthesis signals exist after design elaboration, but before any synthesis optimizations are done. This set of signals should reflect your register transfer level (RTL) signals.

就是要關閉"Incremental Compilation"增量編譯.

謝謝riple!!!

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