EDA 電子設計自動化VHDL系列課程12 – 用點陣顯示器 設計彩燈或動畫

本EDA系列介紹的系統環境是：

軟件： VHDL編程語言 ；
工具： Quartus13.0
FPGA 芯片是： Cyclone III ： EP3C10E144C8
電路板細節在：添加鏈接描述

用點陣顯示器 設計彩燈或動畫

為了便于理解程序分了兩部分：

第一部分：函數庫，有8中圖案，圖案我沒設計，大家自己設計吧。都是固定圖案。

LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; PACKAGE dotpack ISFUNCTION ADDT(addrr: IN INTEGER RANGE 0 TO 15)RETURN STD_LOGIC_VECTOR;FUNCTION DOTSEL0(addrr: IN INTEGER RANGE 0 TO 15)RETURN STD_LOGIC_VECTOR;FUNCTION DOTSEL1(addrr: IN INTEGER RANGE 0 TO 15)RETURN STD_LOGIC_VECTOR;FUNCTION DOTSEL2(addrr: IN INTEGER RANGE 0 TO 15)RETURN STD_LOGIC_VECTOR;FUNCTION DOTSEL3(addrr: IN INTEGER RANGE 0 TO 15)RETURN STD_LOGIC_VECTOR;FUNCTION DOTSEL4(addrr: IN INTEGER RANGE 0 TO 15)RETURN STD_LOGIC_VECTOR;FUNCTION DOTSEL5(addrr: IN INTEGER RANGE 0 TO 15)RETURN STD_LOGIC_VECTOR;FUNCTION DOTSEL6(addrr: IN INTEGER RANGE 0 TO 15)RETURN STD_LOGIC_VECTOR;FUNCTION DOTSEL7(addrr: IN INTEGER RANGE 0 TO 15)RETURN STD_LOGIC_VECTOR； END dotpack;PACKAGE BODY dotpack ISFUNCTION ADDT(addrr: IN INTEGER RANGE 0 TO 15)RETURN STD_LOGIC_VECTOR ISBEGINCASE addrr IS WHEN 0 => RETURN "0000";WHEN 1 => RETURN "0001";WHEN 2 => RETURN "0010";WHEN 3 => RETURN "0011";WHEN 4 => RETURN "0100";WHEN 5 => RETURN "0101";WHEN 6 => RETURN "0110";WHEN 7 => RETURN "0111";WHEN 8 => RETURN "1000";WHEN 9 => RETURN "1001";WHEN 10 => RETURN "1010";WHEN 11 => RETURN "1011";WHEN 12 => RETURN "1100";WHEN 13 => RETURN "1101";WHEN 14 => RETURN "1110";WHEN 15 => RETURN "1111";WHEN OTHERS => RETURN "XXXX";END CASE;END ADDT;FUNCTION DOTSEL0(addrr: IN INTEGER RANGE 0 TO 15 )RETURN STD_LOGIC_VECTOR ISBEGINCASE addrr IS WHEN 0 => RETURN "0000000000000000";WHEN 1 => RETURN "0000000000000000";WHEN 2 => RETURN "0001111111111000";WHEN 3 => RETURN "0000000110000000";WHEN 4 => RETURN "0000000110000000";WHEN 5 => RETURN "0000000110000000";WHEN 6 => RETURN "0000000110000000";WHEN 7 => RETURN "0000000110000000";WHEN 8 => RETURN "0000000110000000";WHEN 9 => RETURN "0000000000000000";WHEN 10 => RETURN "0000000110000000";WHEN 11 => RETURN "0000000110000000";WHEN 12 => RETURN "0000000110000000";WHEN 13 => RETURN "0000000110000000";WHEN 14 => RETURN "0000000000000000";WHEN 15 => RETURN "0000000000000000";WHEN OTHERS => RETURN "XXXXXXXXXXXXXXXX";END CASE;END DOTSEL0;FUNCTION DOTSEL1(addrr: IN INTEGER RANGE 0 TO 15 )RETURN STD_LOGIC_VECTOR ISBEGINCASE addrr IS WHEN 0 => RETURN "0000000000000000";WHEN 1 => RETURN "0000000000000000";WHEN 2 => RETURN "0001111111111000";WHEN 3 => RETURN "0000000110000000";WHEN 4 => RETURN "0000000110000000";WHEN 5 => RETURN "0000000110000000";WHEN 6 => RETURN "0001111111111000";WHEN 7 => RETURN "0001111111111000";WHEN 8 => RETURN "0001111111111000";WHEN 9 => RETURN "0000000000000000";WHEN 10 => RETURN "0000000110000000";WHEN 11 => RETURN "0000000110000000";WHEN 12 => RETURN "0000000110000000";WHEN 13 => RETURN "0000000110000000";WHEN 14 => RETURN "0000000000000000";WHEN 15 => RETURN "0000000000000000";WHEN OTHERS => RETURN "XXXXXXXXXXXXXXXX";END CASE;END DOTSEL1;FUNCTION DOTSEL2(addrr: IN INTEGER RANGE 0 TO 15 )RETURN STD_LOGIC_VECTOR ISBEGINCASE addrr IS WHEN 0 => RETURN "0000000000000000";WHEN 1 => RETURN "0000000000000000";WHEN 2 => RETURN "0001111111111000";WHEN 3 => RETURN "0001111111111000";WHEN 4 => RETURN "0000000110000000";WHEN 5 => RETURN "0001111111111000";WHEN 6 => RETURN "0000000110000000";WHEN 7 => RETURN "0000000110000000";WHEN 8 => RETURN "0000000110000000";WHEN 9 => RETURN "0001111111111000";WHEN 10 => RETURN "0000000110000000";WHEN 11 => RETURN "0000000110000000";WHEN 12 => RETURN "0001111111111000";WHEN 13 => RETURN "0001111111111000";WHEN 14 => RETURN "0001111111111000";WHEN 15 => RETURN "0000000000000000";WHEN OTHERS => RETURN "XXXXXXXXXXXXXXXX";END CASE;END DOTSEL2;FUNCTION DOTSEL3(addrr: IN INTEGER RANGE 0 TO 15 )RETURN STD_LOGIC_VECTOR ISBEGINCASE addrr IS WHEN 0 => RETURN "0000000000000000";WHEN 1 => RETURN "0000000000000000";WHEN 2 => RETURN "0000000000000000";WHEN 3 => RETURN "0000000110000000";WHEN 4 => RETURN "1111111111111111";WHEN 5 => RETURN "1111111111111111";WHEN 6 => RETURN "1111111111111111";WHEN 7 => RETURN "1111111111111111";WHEN 8 => RETURN "0000000110000000";WHEN 9 => RETURN "0000000000000000";WHEN 10 => RETURN "0001111111111000";WHEN 11 => RETURN "1111111111111111";WHEN 12 => RETURN "0000000110000000";WHEN 13 => RETURN "0000000110000000";WHEN 14 => RETURN "0000000000000000";WHEN 15 => RETURN "0000000000000000";WHEN OTHERS => RETURN "XXXXXXXXXXXXXXXX";END CASE;END DOTSEL3;FUNCTION DOTSEL4(addrr: IN INTEGER RANGE 0 TO 15 )RETURN STD_LOGIC_VECTOR ISBEGINCASE addrr IS WHEN 0 => RETURN "1111111111111111";WHEN 1 => RETURN "0000000000000000";WHEN 2 => RETURN "1111111111111111";WHEN 3 => RETURN "0000000110000000";WHEN 4 => RETURN "1111111111111111";WHEN 5 => RETURN "0000000110000000";WHEN 6 => RETURN "1111111111111111";WHEN 7 => RETURN "0001111111111000";WHEN 8 => RETURN "1111111111111111";WHEN 9 => RETURN "0000000000000000";WHEN 10 => RETURN "1111111111111111";WHEN 11 => RETURN "0000000110000000";WHEN 12 => RETURN "1111111111111111";WHEN 13 => RETURN "0000000110000000";WHEN 14 => RETURN "1111111111111111";WHEN 15 => RETURN "0000000000000000";WHEN OTHERS => RETURN "XXXXXXXXXXXXXXXX";END CASE;END DOTSEL4;FUNCTION DOTSEL5(addrr: IN INTEGER RANGE 0 TO 15 )RETURN STD_LOGIC_VECTOR ISBEGINCASE addrr IS WHEN 0 => RETURN "0000000000000000";WHEN 1 => RETURN "0000000000000000";WHEN 2 => RETURN "0001111111111000";WHEN 3 => RETURN "0001111111111000";WHEN 4 => RETURN "0000000110000000";WHEN 5 => RETURN "0001111111111000";WHEN 6 => RETURN "0000000110000000";WHEN 7 => RETURN "0000000110000000";WHEN 8 => RETURN "0000000110000000";WHEN 9 => RETURN "0001111111111000";WHEN 10 => RETURN "0000000110000000";WHEN 11 => RETURN "0000000110000000";WHEN 12 => RETURN "0001111111111000";WHEN 13 => RETURN "0001111111111000";WHEN 14 => RETURN "0001111111111000";WHEN 15 => RETURN "0000000000000000";WHEN OTHERS => RETURN "XXXXXXXXXXXXXXXX";END CASE;END DOTSEL5;FUNCTION DOTSEL6(addrr: IN INTEGER RANGE 0 TO 15 )RETURN STD_LOGIC_VECTOR ISBEGINCASE addrr IS WHEN 0 => RETURN "0000000000000000";WHEN 1 => RETURN "0000000000000000";WHEN 2 => RETURN "0000000000000000";WHEN 3 => RETURN "0000000110000000";WHEN 4 => RETURN "1111111111111111";WHEN 5 => RETURN "1111111111111111";WHEN 6 => RETURN "1111111111111111";WHEN 7 => RETURN "1111111111111111";WHEN 8 => RETURN "0000000110000000";WHEN 9 => RETURN "0000000000000000";WHEN 10 => RETURN "0001111111111000";WHEN 11 => RETURN "1111111111111111";WHEN 12 => RETURN "0000000110000000";WHEN 13 => RETURN "0000000110000000";WHEN 14 => RETURN "0000000000000000";WHEN 15 => RETURN "0000000000000000";WHEN OTHERS => RETURN "XXXXXXXXXXXXXXXX";END CASE;END DOTSEL6;FUNCTION DOTSEL7(addrr: IN INTEGER RANGE 0 TO 15 )RETURN STD_LOGIC_VECTOR ISBEGINCASE addrr IS WHEN 0 => RETURN "1111111111111111";WHEN 1 => RETURN "0000000000000000";WHEN 2 => RETURN "1111111111111111";WHEN 3 => RETURN "0000000110000000";WHEN 4 => RETURN "1111111111111111";WHEN 5 => RETURN "0000000110000000";WHEN 6 => RETURN "1111111111111111";WHEN 7 => RETURN "0001111111111000";WHEN 8 => RETURN "1111111111111111";WHEN 9 => RETURN "0000000000000000";WHEN 10 => RETURN "1111111111111111";WHEN 11 => RETURN "0000000110000000";WHEN 12 => RETURN "1111111111111111";WHEN 13 => RETURN "0000000110000000";WHEN 14 => RETURN "1111111111111111";WHEN 15 => RETURN "0000000000000000";WHEN OTHERS => RETURN "XXXXXXXXXXXXXXXX";END CASE;END DOTSEL7;END ;

第二部分：程序體，需要對時鐘clk兩種頻率分頻: clock 和 subclock。其中clock負責快速掃描刷新顯示器。subclock 負責圖案的更貼，產生動畫效果。 用戶可以根據自己的時鐘調整相應的分頻程度。

LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE work.dotpack.all;ENTITY cartoon ISPORT( clk : IN STD_LOGIC;DOTOUT: OUT STD_LOGIC_VECTOR(0 TO 19); -- DOTOUT(0 to 3) is addressVGA: OUT STD_LOGIC_VECTOR(0 TO 3)); END cartoon;ARCHITECTURE one OF cartoon IS CONSTANT FP: INTEGER:= 20000; SIGNAL qb: INTEGER RANGE 0 TO FP; --frequency divide: 分頻 CONSTANT subFP: INTEGER:= 8000000; SIGNAL subqb: INTEGER RANGE 0 TO subFP ; --frequency divide: 分頻 SIGNAL clock, subclock: STD_LOGIC; SIGNAL add: INTEGER RANGE 0 TO 15; SIGNAL picture: INTEGER RANGE 0 TO 7; -- pictures shown one by one;BEGINPROCESS(clk)BEGIN IF clk'EVENT AND clk = '1' THENqb <= qb + 1; subqb <= subqb + 1;IF qb = FP THEN clock <= NOT clock; qb <= 0; END IF;IF subqb = subFP THEN subclock <= NOT subclock; subqb <= 0; END IF;END IF;END PROCESS;PROCESS(clock) -- around >=30 times a sencond doing refreshing BEGINVGA <= "1010"; -- device select:dot matrix screen;IF clock'EVENT AND clock = '0' THENDOTOUT(0 to 3) <= ADDT(add); add <= add + 1; IF picture = 0 THEN DOTOUT(4 to 19) <= DOTSEL0(add); ELSIF picture = 1 THEN DOTOUT(4 to 19) <= DOTSEL1(add);ELSIF picture = 2 THEN DOTOUT(4 to 19) <= DOTSEL2(add);ELSIF picture = 3 THEN DOTOUT(4 to 19) <= DOTSEL3(add);ELSIF picture = 4 THEN DOTOUT(4 to 19) <= DOTSEL4(add);ELSIF picture = 5 THEN DOTOUT(4 to 19) <= DOTSEL5(add);ELSIF picture = 6 THEN DOTOUT(4 to 19) <= DOTSEL6(add);ELSIF picture = 7 THEN DOTOUT(4 to 19) <= DOTSEL7(add);END IF;END IF;END PROCESS;PROCESS( subclock ) -- cartoon controlBEGIN IF subclock'EVENT AND subclock = '0' THEN picture <= picture + 1 ; END IF;END PROCESS;END one;

總結

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