使用ioctl命令時(shí)，可以看到上述兩個(gè)命令的存在，

在頭文件 include/linux/sockios.h，定義如下：

#define SIOCETHTOOL?? ?0x8946?? ??? ?/* Ethtool interface?? ??? ?*/???? ethtool 接口

#define SIOCGMIIPHY?? ?0x8947?? ??? ?/* Get address of MII PHY in use. */??? 獲取MII phy的地址
#define SIOCGMIIREG?? ?0x8948?? ??? ?/* Read MII PHY register.?? ?*/???? 讀取 MII phy 寄存器
#define SIOCSMIIREG?? ?0x8949?? ??? ?/* Write MII PHY register.?? ?*/????? 寫MII phy 寄存器

內(nèi)核中對(duì)于上述兩個(gè)命令的處理定義在文件? /drivers/net/phy/phy.c 的函數(shù) phy_mii_ioctl中，

函數(shù)原型如下：

/**
?* phy_mii_ioctl - generic PHY MII ioctl interface
?* @phydev: the phy_device struct
?* @ifr: &struct ifreq for socket ioctl's
?* @cmd: ioctl cmd to execute
?*
?* Note that this function is currently incompatible with the
?* PHYCONTROL layer.? It changes registers without regard to
?* current state.? Use at own risk.
?*/
int phy_mii_ioctl(struct phy_device *phydev,
?? ??? ?struct ifreq *ifr, int cmd)
{
?? ?struct mii_ioctl_data *mii_data = if_mii(ifr);
?? ?u16 val = mii_data->val_in;

?? ?switch (cmd) {
?? ?case SIOCGMIIPHY:???? // 獲取phy的地址
?? ??? ?mii_data->phy_id = phydev->addr;
?? ??? ?/* fall through */

?? ?case SIOCGMIIREG:
?? ??? ?mii_data->val_out = mdiobus_read(phydev->bus,? mii_data->phy_id, mii_data->reg_num);
?? ??? ?break;

?? ?case SIOCSMIIREG:
?? ??? ?if (mii_data->phy_id == phydev->addr) {
?? ??? ??? ?switch(mii_data->reg_num) {
?? ??? ??? ??? ?case MII_BMCR:
?? ??? ??? ??? ??? ?if ((val & (BMCR_RESET|BMCR_ANENABLE)) == 0)
?? ??? ??? ??? ??? ??? ?phydev->autoneg = AUTONEG_DISABLE;
?? ??? ??? ??? ??? ?else
?? ??? ??? ??? ??? ??? ?phydev->autoneg = AUTONEG_ENABLE;
?? ??? ??? ??? ??? ?if ((!phydev->autoneg) && (val & BMCR_FULLDPLX))
?? ??? ??? ??? ??? ??? ?phydev->duplex = DUPLEX_FULL;
?? ??? ??? ??? ??? ?else
?? ??? ??? ??? ??? ??? ?phydev->duplex = DUPLEX_HALF;
?? ??? ??? ??? ??? ?if ((!phydev->autoneg) &&
?? ??? ??? ??? ??? ??? ??? ?(val & BMCR_SPEED1000))
?? ??? ??? ??? ??? ??? ?phydev->speed = SPEED_1000;
?? ??? ??? ??? ??? ?else if ((!phydev->autoneg) &&
?? ??? ??? ??? ??? ??? ??? ?(val & BMCR_SPEED100))
?? ??? ??? ??? ??? ??? ?phydev->speed = SPEED_100;
?? ??? ??? ??? ??? ?break;
?? ??? ??? ??? ?case MII_ADVERTISE:
?? ??? ??? ??? ??? ?phydev->advertising = val;
?? ??? ??? ??? ??? ?break;
?? ??? ??? ??? ?default:
?? ??? ??? ??? ??? ?/* do nothing */
?? ??? ??? ??? ??? ?break;
?? ??? ??? ?}
?? ??? ?}

?? ??? ?mdiobus_write(phydev->bus, mii_data->phy_id,
?? ??? ??? ?????? mii_data->reg_num, val);

?? ??? ?if (mii_data->reg_num == MII_BMCR &&
?? ??? ???? val & BMCR_RESET &&
?? ??? ???? phydev->drv->config_init) {
?? ??? ??? ?phy_scan_fixups(phydev);
?? ??? ??? ?phydev->drv->config_init(phydev);
?? ??? ?}
?? ??? ?break;

?? ?case SIOCSHWTSTAMP:
?? ??? ?if (phydev->drv->hwtstamp)
?? ??? ??? ?return phydev->drv->hwtstamp(phydev, ifr);
?? ??? ?/* fall through */

?? ?default:
?? ??? ?return -EOPNOTSUPP;
?? ?}

?? ?return 0;
}
EXPORT_SYMBOL(phy_mii_ioctl);

?

?

補(bǔ)充：

關(guān)于MII，百度內(nèi)容如下：

MII即“媒體獨(dú)立接口”，也叫“獨(dú)立于介質(zhì)的接口”。它是IEEE-802.3定義的以太網(wǎng)行業(yè)標(biāo)準(zhǔn)。它包括一個(gè)數(shù)據(jù)接口，以及一個(gè)MAC和PHY之間的管理接口。

RMII全稱為“簡(jiǎn)化的媒體獨(dú)立接口”，是IEEE-802.3u標(biāo)準(zhǔn)中除MII接口之外的另一種實(shí)現(xiàn)。

獨(dú)立于介質(zhì)的接口(MII) 用于MAC與外接的PHY互聯(lián)，支持10Mbit/s和100Mbit/s數(shù)據(jù)傳輸模式。

?

轉(zhuǎn)載于:https://www.cnblogs.com/rohens-hbg/p/8559317.html

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