ISE14.7 spartan3e呼吸燈

• 呼吸燈原理
• • 代碼
  • 插入鏈接與圖片

呼吸燈原理

先分頻，再控制占空比，通過控制led的亮燈時間(PWM波)來實現呼吸功能。功能就是讓led燈2s為從暗到亮，下一個2s從亮到暗。具體實現為將2s分為1000份。在這1000份里邊，依次增加亮燈的時間。2s的1000份就是2ms所以將2ms再分為1000份，就是2us。第一個2ms，亮led2us 第二個2ms，亮led4us…然后依次增加。

代碼

module top_module(input clk, // 50Mhz, 50_000_000 clk/s---20nsinput rstn,output [7:0] led);reg [7:0] cnt;reg time_2s;reg [15:0] cnt_1ms;reg [15:0] cnt_1us;reg light;always @(posedge clk or posedge rstn) beginif (rstn)begincnt <= 7'd0;time_2s <= 1'b0; // 100_000_000 clk---2scnt_1ms <= 16'd0; // 50_000 clkcnt_1us <= 16'd0; // 50 clkendelse if(cnt_1ms >= 16'd1000-1) begincnt_1ms <= 16'd0;time_2s <= ~time_2s;endelse if(cnt_1us >= 16'd1000-1) begincnt_1ms <= cnt_1ms + 16'd1;cnt_1us <= 16'd0;endelse if(cnt >= 8'd50-1)begincnt_1us <= cnt_1us + 8'd1;cnt <= 8'd0;endelse begincnt <= cnt + 8'd1;endendalways @(*) begincase(time_2s)1'b0:light = (cnt_1us < cnt_1ms) ? 1'b1 : 1'b0;1'b1:light = (cnt_1us > cnt_1ms) ? 1'b1 : 1'b0;endcaseendassign led = {{8{light}}}; endmodule module top_module_tb;// top_module Parameters parameter PERIOD = 10;// top_module Inputs reg clk = 0 ; reg rstn = 0 ;// top_module Outputs wire [7:0] led ;initial beginforever #(PERIOD/2) clk=~clk; endinitial begin#(PERIOD*2) rstn = 1; endtop_module u_top_module (.clk ( clk ),.rstn ( rstn ),.led ( led [7:0] ) );initial begin#20;rstn = 1;#40;rstn = 0;// $finish; endendmodule

約束文件

# Generated by www.ivysim.com 12 September 2022 3.47PM ##################################################### ### SPARTAN-3E STARTER KIT BOARD CONSTRAINTS FILE ##################################################### # ==== Analog-to-Digital Converter (ADC) ==== # some connections shared with SPI Flash, DAC, ADC, and AMP #NET "ad_conv" LOC = "P11" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 6 ;# ==== Programmable Gain Amplifier (AMP) ==== # some connections shared with SPI Flash, DAC, ADC, and AMP #NET "amp_cs" LOC = "N7" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 6 ; #NET "amp_dout" LOC = "E18" | IOSTANDARD = LVCMOS33 ; #NET "amp_shdn" LOC = "P7" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 6 ;# ==== Pushbuttons (BTN) ==== #NET "btn_east" LOC = "H13" | IOSTANDARD = LVTTL | PULLDOWN ; NET "rstn" LOC = "V4" | IOSTANDARD = LVTTL | PULLDOWN ; #NET "btn_south" LOC = "K17" | IOSTANDARD = LVTTL | PULLDOWN ; #NET "btn_west" LOC = "D18" | IOSTANDARD = LVTTL | PULLDOWN ;# ==== Clock inputs (CLK) ==== NET "clk" LOC = "C9" | IOSTANDARD = LVCMOS33 ; # Define clock period for 50 MHz oscillator (40%/60% duty-cycle) NET "clk" PERIOD = 20.0ns HIGH 40%; #NET "clk_aux" LOC = "B8" | IOSTANDARD = LVCMOS33 ; #NET "clk_sma" LOC = "A10" | IOSTANDARD = LVCMOS33 ;# ==== Digital-to-Analog Converter (DAC) ==== # some connections shared with SPI Flash, DAC, ADC, and AMP #NET "dac_clr" LOC = "P8" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; #NET "dac_cs" LOC = "N8" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ;# ==== 1-Wire Secure EEPROM (DS) #NET "ds_wire" LOC = "U4" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;# ==== Ethernet PHY (E) ==== #NET "e_col" LOC = "U6" | IOSTANDARD = LVCMOS33 ; #NET "e_crs" LOC = "U13" | IOSTANDARD = LVCMOS33 ; #NET "e_mdc" LOC = "P9" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; #NET "e_mdio" LOC = "U5" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; #NET "e_rx_clk" LOC = "V3" | IOSTANDARD = LVCMOS33 ; #NET "e_rx_dv" LOC = "V2" | IOSTANDARD = LVCMOS33 ; #NET "e_rxd<0>" LOC = "V8" | IOSTANDARD = LVCMOS33 ; #NET "e_rxd<1>" LOC = "T11" | IOSTANDARD = LVCMOS33 ; #NET "e_rxd<2>" LOC = "U11" | IOSTANDARD = LVCMOS33 ; #NET "e_rxd<3>" LOC = "V14" | IOSTANDARD = LVCMOS33 ; #NET "e_rxd<4>" LOC = "U14" | IOSTANDARD = LVCMOS33 ; #NET "e_tx_clk" LOC = "T7" | IOSTANDARD = LVCMOS33 ; #NET "e_tx_en" LOC = "P15" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; #NET "e_txd<0>" LOC = "R11" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; #NET "e_txd<1>" LOC = "T15" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; #NET "e_txd<2>" LOC = "R5" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; #NET "e_txd<3>" LOC = "T5" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; #NET "e_txd<4>" LOC = "R6" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ;# ==== FPGA Configuration Mode, INIT_B Pins (FPGA) ==== #NET "fpga_m0" LOC = "M10" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; #NET "fpga_m1" LOC = "V11" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; #NET "fpga_m2" LOC = "T10" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; #NET "fpga_init_b" LOC = "T3" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ; #NET "fpga_rdwr_b" LOC = "U10" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ; #NET "fpga_hswap" LOC = "B3" | IOSTANDARD = LVCMOS33 ;# ==== FX2 Connector (FX2) ==== #NET "fx2_clkin" LOC = "E10" | IOSTANDARD = LVCMOS33 ; #NET "fx2_clkio" LOC = "D9" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ; #NET "fx2_clkout" LOC = "D10" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ; # These four connections are shared with the J1 6-pin accessory header #NET "fx2_io<1>" LOC = "B4" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ; #NET "fx2_io<2>" LOC = "A4" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ; #NET "fx2_io<3>" LOC = "D5" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ; #NET "fx2_io<4>" LOC = "C5" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ; # These four connections are shared with the J2 6-pin accessory header #NET "fx2_io<5>" LOC = "A6" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ; #NET "fx2_io<6>" LOC = "B6" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ; #NET "fx2_io<7>" LOC = "E7" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ; #NET "fx2_io<8>" LOC = "F7" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ; # These four connections are shared with the J4 6-pin accessory header #NET "fx2_io<9>" LOC = "D7" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ; #NET "fx2_io<10>" LOC = "C7" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ; #NET "fx2_io<11>" LOC = "F8" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ; #NET "fx2_io<12>" LOC = "E8" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ; # The discrete LEDs are shared with the following 8 FX2 connections #NET "fx2_io<13>" LOC = "F9" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ; #NET "fx2_io<14>" LOC = "E9" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ; #NET "fx2_io<15>" LOC = "D11" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ; #NET "fx2_io<16>" LOC = "C11" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ; #NET "fx2_io<17>" LOC = "F11" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ; #NET "fx2_io<18>" LOC = "E11" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ; #NET "fx2_io<19>" LOC = "E12" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ; #NET "fx2_io<20>" LOC = "F12" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ; #NET "fx2_io<21>" LOC = "A13" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ; #NET "fx2_io<22>" LOC = "B13" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ; #NET "fx2_io<23>" LOC = "A14" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ; #NET "fx2_io<24>" LOC = "B14" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ; #NET "fx2_io<25>" LOC = "C14" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ; #NET "fx2_io<26>" LOC = "D14" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ; #NET "fx2_io<27>" LOC = "A16" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ; #NET "fx2_io<28>" LOC = "B16" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ; #NET "fx2_io<29>" LOC = "E13" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ; #NET "fx2_io<30>" LOC = "C4" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ; #NET "fx2_io<31>" LOC = "B11" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ; #NET "fx2_io<32>" LOC = "A11" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ; #NET "fx2_io<33>" LOC = "A8" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ; #NET "fx2_io<34>" LOC = "G9" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ; #NET "fx2_ip<35>" LOC = "D12" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ; #NET "fx2_ip<36>" LOC = "C12" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ; #NET "fx2_ip<37>" LOC = "A15" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ; #NET "fx2_ip<38>" LOC = "B15" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ; #NET "fx2_io<39>" LOC = "C3" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ; #NET "fx2_ip<40>" LOC = "C15" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;# ==== 6-pin header J1 ==== # These are shared connections with the FX2 connector #NET "j1<0>" LOC = "B4" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 6 ; #NET "j1<1>" LOC = "A4" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 6 ; #NET "j1<2>" LOC = "D5" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 6 ; #NET "j1<3>" LOC = "C5" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 6 ;# ==== 6-pin header J2 ==== # These are shared connections with the FX2 connector #NET "j2<0>" LOC = "A6" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 6 ; #NET "j2<1>" LOC = "B6" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 6 ; #NET "j2<2>" LOC = "E7" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 6 ; #NET "j2<3>" LOC = "F7" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 6 ;# ==== 6-pin header J4 ==== # These are shared connections with the FX2 connector #NET "j4<0>" LOC = "D7" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 6 ; #NET "j4<1>" LOC = "C7" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 6 ; #NET "j4<2>" LOC = "F8" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 6 ; #NET "j4<3>" LOC = "E8" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 6 ;# ==== Character LCD (LCD) ==== #NET "lcd_e" LOC = "M18" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "lcd_rs" LOC = "L18" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "lcd_rw" LOC = "L17" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; # LCD data connections are shared with StrataFlash connections SF_D<11:8> #NET "sf_d<8>" LOC = "R15" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_d<9>" LOC = "R16" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_d<10>" LOC = "P17" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_d<11>" LOC = "M15" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;# ==== Discrete LEDs (LED) ==== # These are shared connections with the FX2 connector NET "led<0>" LOC = "F12" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 4 ; NET "led<1>" LOC = "E12" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 4 ; NET "led<2>" LOC = "E11" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 4 ; NET "led<3>" LOC = "F11" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 4 ; NET "led<4>" LOC = "C11" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 4 ; NET "led<5>" LOC = "D11" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 4 ; NET "led<6>" LOC = "E9" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 4; NET "led<7>" LOC = "F9" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 4;# ==== PS/2 Mouse/Keyboard Port (PS2) ==== #NET "ps2_clk" LOC = "G14" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW ; #NET "ps2_data" LOC = "G13" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW ;# ==== Rotary Pushbutton Switch (ROT) ==== #NET "rot_a" LOC = "K18" | IOSTANDARD = LVTTL | PULLUP ; #NET "rot_b" LOC = "G18" | IOSTANDARD = LVTTL | PULLUP ; #NET "rot_center" LOC = "V16" | IOSTANDARD = LVTTL | PULLDOWN ;# ==== RS-232 Serial Ports (RS232) ==== #NET "rs232_dce_rxd" LOC = "R7" | IOSTANDARD = LVTTL ; #NET "rs232_dce_txd" LOC = "M14" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = SLOW ; #NET "rs232_dte_rxd" LOC = "U8" | IOSTANDARD = LVTTL ; #NET "rs232_dte_txd" LOC = "M13" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = SLOW ;# ==== DDR SDRAM (SD) ==== (I/O Bank 3, VCCO=2.5V) #NET "sd_a<0>" LOC = "T1" | IOSTANDARD = SSTL2_I ; #NET "sd_a<1>" LOC = "R3" | IOSTANDARD = SSTL2_I ; #NET "sd_a<2>" LOC = "R2" | IOSTANDARD = SSTL2_I ; #NET "sd_a<3>" LOC = "P1" | IOSTANDARD = SSTL2_I ; #NET "sd_a<4>" LOC = "F4" | IOSTANDARD = SSTL2_I ; #NET "sd_a<5>" LOC = "H4" | IOSTANDARD = SSTL2_I ; #NET "sd_a<6>" LOC = "H3" | IOSTANDARD = SSTL2_I ; #NET "sd_a<7>" LOC = "H1" | IOSTANDARD = SSTL2_I ; #NET "sd_a<8>" LOC = "H2" | IOSTANDARD = SSTL2_I ; #NET "sd_a<9>" LOC = "N4" | IOSTANDARD = SSTL2_I ; #NET "sd_a<10>" LOC = "T2" | IOSTANDARD = SSTL2_I ; #NET "sd_a<11>" LOC = "N5" | IOSTANDARD = SSTL2_I ; #NET "sd_a<12>" LOC = "P2" | IOSTANDARD = SSTL2_I ; #NET "sd_ba<0>" LOC = "K5" | IOSTANDARD = SSTL2_I ; #NET "sd_ba<1>" LOC = "K6" | IOSTANDARD = SSTL2_I ; #NET "sd_cas" LOC = "C2" | IOSTANDARD = SSTL2_I ; #NET "sd_ck_n" LOC = "J4" | IOSTANDARD = SSTL2_I ; #NET "sd_ck_p" LOC = "J5" | IOSTANDARD = SSTL2_I ; #NET "sd_cke" LOC = "K3" | IOSTANDARD = SSTL2_I ; #NET "sd_cs" LOC = "K4" | IOSTANDARD = SSTL2_I ; #NET "sd_dq<0>" LOC = "L2" | IOSTANDARD = SSTL2_I ; #NET "sd_dq<1>" LOC = "L1" | IOSTANDARD = SSTL2_I ; #NET "sd_dq<2>" LOC = "L3" | IOSTANDARD = SSTL2_I ; #NET "sd_dq<3>" LOC = "L4" | IOSTANDARD = SSTL2_I ; #NET "sd_dq<4>" LOC = "M3" | IOSTANDARD = SSTL2_I ; #NET "sd_dq<5>" LOC = "M4" | IOSTANDARD = SSTL2_I ; #NET "sd_dq<6>" LOC = "M5" | IOSTANDARD = SSTL2_I ; #NET "sd_dq<7>" LOC = "M6" | IOSTANDARD = SSTL2_I ; #NET "sd_dq<8>" LOC = "E2" | IOSTANDARD = SSTL2_I ; #NET "sd_dq<9>" LOC = "E1" | IOSTANDARD = SSTL2_I ; #NET "sd_dq<10>" LOC = "F1" | IOSTANDARD = SSTL2_I ; #NET "sd_dq<11>" LOC = "F2" | IOSTANDARD = SSTL2_I ; #NET "sd_dq<12>" LOC = "G6" | IOSTANDARD = SSTL2_I ; #NET "sd_dq<13>" LOC = "G5" | IOSTANDARD = SSTL2_I ; #NET "sd_dq<14>" LOC = "H6" | IOSTANDARD = SSTL2_I ; #NET "sd_dq<15>" LOC = "H5" | IOSTANDARD = SSTL2_I ; #NET "sd_ldm" LOC = "J2" | IOSTANDARD = SSTL2_I ; #NET "sd_ldqs" LOC = "L6" | IOSTANDARD = SSTL2_I ; #NET "sd_ras" LOC = "C1" | IOSTANDARD = SSTL2_I ; #NET "sd_udm" LOC = "J1" | IOSTANDARD = SSTL2_I ; #NET "sd_udqs" LOC = "G3" | IOSTANDARD = SSTL2_I ; #NET "sd_we" LOC = "D1" | IOSTANDARD = SSTL2_I ; # Path to allow connection to top DCM connection #NET "sd_ck_fb" LOC = "B9" | IOSTANDARD = LVCMOS33 ; # Prohibit VREF pins # CONFIG PROHIBIT = D2; # CONFIG PROHIBIT = G4; # CONFIG PROHIBIT = J6; # CONFIG PROHIBIT = L5; # CONFIG PROHIBIT = R4;# ==== Intel StrataFlash Parallel NOR Flash (SF) ==== #NET "sf_a<0>" LOC = "H17" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_a<1>" LOC = "J13" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_a<2>" LOC = "J12" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_a<3>" LOC = "J14" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_a<4>" LOC = "J15" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_a<5>" LOC = "J16" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_a<6>" LOC = "J17" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_a<7>" LOC = "K14" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_a<8>" LOC = "K15" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_a<9>" LOC = "K12" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_a<10>" LOC = "K13" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_a<11>" LOC = "L15" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_a<12>" LOC = "L16" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_a<13>" LOC = "T18" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_a<14>" LOC = "R18" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_a<15>" LOC = "T17" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_a<16>" LOC = "U18" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_a<17>" LOC = "T16" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_a<18>" LOC = "U15" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_a<19>" LOC = "V15" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_a<20>" LOC = "T12" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_a<21>" LOC = "V13" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_a<22>" LOC = "V12" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_a<23>" LOC = "N11" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_a<24>" LOC = "A11" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_byte" LOC = "C17" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_ce0" LOC = "D16" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_d<1>" LOC = "P10" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_d<2>" LOC = "R10" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_d<3>" LOC = "V9" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_d<4>" LOC = "U9" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_d<5>" LOC = "R9" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_d<6>" LOC = "M9" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_d<7>" LOC = "N9" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_d<8>" LOC = "R15" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_d<9>" LOC = "R16" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_d<10>" LOC = "P17" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_d<11>" LOC = "M15" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_d<12>" LOC = "M16" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_d<13>" LOC = "P6" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_d<14>" LOC = "R8" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_d<15>" LOC = "T8" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_oe" LOC = "C18" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "sf_sts" LOC = "B18" | IOSTANDARD = LVCMOS33 ; #NET "sf_we" LOC = "D17" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;# ==== STMicro SPI serial Flash (SPI) ==== # some connections shared with SPI Flash, DAC, ADC, and AMP #NET "spi_miso" LOC = "N10" | IOSTANDARD = LVCMOS33 ; #NET "spi_mosi" LOC = "T4" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 6 ; #NET "spi_sck" LOC = "U16" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 6 ; #NET "spi_ss_b" LOC = "U3" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 6 ; #NET "spi_alt_cs_jp11" LOC = "R12" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 6 ;# ==== Slide Switches (SW) ==== #NET "sw<0>" LOC = "L13" | IOSTANDARD = LVTTL | PULLUP ; #NET "sw<1>" LOC = "L14" | IOSTANDARD = LVTTL | PULLUP ; #NET "sw<2>" LOC = "H18" | IOSTANDARD = LVTTL | PULLUP ; #NET "sw<3>" LOC = "N17" | IOSTANDARD = LVTTL | PULLUP ;# ==== VGA Port (VGA) ==== #NET "vga_blue" LOC = "G15" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ; #NET "vga_green" LOC = "H15" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ; #NET "vga_hsync" LOC = "F15" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ; #NET "vga_red" LOC = "H14" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ; #NET "vga_vsync" LOC = "F14" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;# ==== Xilinx CPLD (XC) ==== #NET "xc_cmd<0>" LOC = "P18" | IOSTANDARD = LVTTL | DRIVE = 4 | SLEW = SLOW ; #NET "xc_cmd<1>" LOC = "N18" | IOSTANDARD = LVTTL | DRIVE = 4 | SLEW = SLOW ; #NET "xc_cpld_en" LOC = "B10" | IOSTANDARD = LVTTL ; #NET "xc_d<0>" LOC = "G16" | IOSTANDARD = LVTTL | DRIVE = 4 | SLEW = SLOW ; #NET "xc_d<1>" LOC = "F18" | IOSTANDARD = LVTTL | DRIVE = 4 | SLEW = SLOW ; #NET "xc_d<2>" LOC = "F17" | IOSTANDARD = LVTTL | DRIVE = 4 | SLEW = SLOW ; #NET "xc_trig" LOC = "R17" | IOSTANDARD = LVCMOS33 ; #NET "xc_gck0" LOC = "H16" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; #NET "gclk10" LOC = "C9" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;

其中，以上UCF文件是通過配置軟件：s3etop10 生成，官網鏈接在第一行有。隨后在上板驗證時發現問題，即下載好了程序但是報錯為‘DONE’電平未拉高，同時也沒有預期實驗現象，反復檢查都不知道出什么問題，回顧以前寫的UCF文件都只有約束而沒有注釋#，猜測刪除注釋可能解決問題，經過實驗確實如此，寫此文記錄一下。

NET "rstn" LOC = "V4" | IOSTANDARD = LVTTL | PULLDOWN ; NET "clk" LOC = "C9" | IOSTANDARD = LVCMOS33 ; NET "clk" PERIOD = 20.0ns HIGH 40%; NET "led<0>" LOC = "F12" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 4 ; NET "led<1>" LOC = "E12" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 4 ; NET "led<2>" LOC = "E11" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 4 ; NET "led<3>" LOC = "F11" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 4 ; NET "led<4>" LOC = "C11" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 4 ; NET "led<5>" LOC = "D11" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 4 ; NET "led<6>" LOC = "E9" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 4; NET "led<7>" LOC = "F9" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 4;

插入鏈接與圖片

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