直接上代碼模板：

library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_arith.all; use ieee.std_logic_unsigned.all; --//TXT相關的Library庫 use std.textio.all; use ieee.std_logic_textio.all;--//實體 entity wr_txt_tb is --generic(); --port(); end entity;--//實體 architecture beha of wr_txt_tb is--//定義元件及其端口--//定義常量（時間） constant PERIOD : time := 5ns; constant INPUT_FILE : string:= "data_input.txt"; constant OUTPUT_FILE : string:= "data_output.txt";--//定義其他信號 signal dv_i : std_logic:= '0'; signal da_i0 : std_logic_vector(7 downto 0):=(others =>'0'); signal da_i1 : std_logic_vector(7 downto 0):=(others =>'0'); signal da_i2 : std_logic_vector(7 downto 0):=(others =>'0'); signal da_i3 : std_logic_vector(7 downto 0):=(others =>'0'); signal sim_end : std_logic:= '0'; signal dv_o : std_logic:= '0'; signal da_o : std_logic_vector(7 downto 0):=(others =>'0');signal clk : std_logic := '0'; signal nRST : std_logic := '0'; signal RST : std_logic := '1'; signal cnt : std_logic_vector(7 downto 0):=(others =>'0');----------------------------------------------------------------------------------- begin ----------------------------------------------------------------------------------- clk <= not clk after (PERIOD/2); nRST <= '1' after 2*PERIOD; RST <= not nRST; -----------------------------讀數據------------------------------ process_read_file : process(clk,nRST) constant NUM_COL : integer := 4; --number fo column of file type data_array is array(integer range<>) of std_logic_vector(7 downto 0); file file_in : text open read_mode is INPUT_FILE; variable line_in: line; variable data_in : data_array(1 to NUM_COL); --文件里一行只有多個數（用空格隔開） -- variable data_in : std_logic_vector(7 downto 0);--文件里一行只有一個數 beginif nRST = '0' thenelsif(rising_edge(clk)) thenif not(endfile(file_in)) thendv_i <= '1';readline(file_in, line_in);for j in 1 to NUM_COL loop --一行有多個數，同時讀出read(line_in, data_in(j));end loop;da_i0 <= data_in(1);da_i1 <= data_in(2);da_i2 <= data_in(3);da_i3 <= data_in(4);elsedv_i <= '0';da_i0 <= (others => '0');da_i1 <= (others => '0');da_i2 <= (others => '0');da_i3 <= (others => '0');end if;end if; end process; ---------------------------寫數據----------------------------- process(clk,nRST)beginif nRST = '0' thencnt <= (others => '0');elsif rising_edge(clk) thenif cnt(7) = '0' thencnt <= cnt + '1';end if;if cnt(7) = '0' thendv_o <= '1';elsedv_o <= '0';sim_end <= '1';end if;end if; end process; da_o <= cnt;process_write_file : process(clk,nRST) file file_out : text open write_mode is OUTPUT_FILE; variable line_out:LINE; beginif(nRST = '0') thenelsif(rising_edge(clk))thenif(sim_end = '1') then --利用sim_end來控制關閉文件file_close(file_out);elsif(dv_o='1') thenwrite(line_out, da_o, left, 15); --以二進制存儲；left表示左對齊，相反，right表示右對齊；15表示字符長度（可用來插入空格）-- write(line_out, conv_integer(da_o), left, 15); --以整數存儲-- hwrite(line_out, da_o, left, 15); --以十六進制存儲-- hwrite(line_out, x"00"&da_o, left, 15); --以4位十六進制存儲writeline(file_out,line_out);end if;end if; end process;end beha;

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